A XModem Bootloader for the NEORV32 CPU on the DE0-Nano board.

My reference design for a DE0-Nano board with a NEORV32.

Debugging a RISC-V application inside a NEORV32 with Ozone the J-Link Debugger.

Using SEGGER Embedded Studio for the software development with NEORV32.

The NEORV32 RISC-V Processor for Intel FPGA boards.

My experience with J-Link EDU and OpenOCD.

For the easier use of JTAG there is now an adapter available.

These examples here can be used for a starting point for your own work with the NEORV32.
I will provide you some small examples for the Intel FPGA boards.